The present disclosure relates to a semiconductor structure, and more particularly to a semiconductor structure including dual gate spacers for laterally spacing merged source/drain regions from an inner gate spacer, and a method of manufacturing the same.
Fin field effect transistors increase the on-current per unit active area of a semiconductor chip by providing vertical channels on sidewalls of a semiconductor fin. For a fin field effect transistor including a plurality of semiconductor fins, merged source/drain regions are formed by selective epitaxy to electrically connect source/drain portions present in the plurality of semiconductor fins. The parasitic capacitance between the merged source/drain regions and the gate electrode increases the switching time for the fin field effect transistor.